/*-------------------------------- Arctic Core ------------------------------
 * Copyright (C) 2013, ArcCore AB, Sweden, www.arccore.com.
 * Contact: <contact@arccore.com>
 *
 * You may ONLY use this file:
 * 1)if you have a valid commercial ArcCore license and then in accordance with
 * the terms contained in the written license agreement between you and ArcCore,
 * or alternatively
 * 2)if you follow the terms found in GNU General Public License version 2 as
 * published by the Free Software Foundation and appearing in the file
 * LICENSE.GPL included in the packaging of this file or here
 * <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>
 *-------------------------------- Arctic Core -----------------------------*/

#ifndef IRQ_TC399_H_
#define IRQ_TC399_H_



#define IRQ_OFFSET(_x)  ((_x)/4uL)


#define IRQ_SRC_CPU0SBSRC       IRQ_OFFSET(0x0000uL)
#define IRQ_SRC_CPU1SBSRC       IRQ_OFFSET(0x0004uL)
#define IRQ_SRC_CPU2SBSRC       IRQ_OFFSET(0x0008uL)
#define IRQ_SRC_CPU3SBSRC       IRQ_OFFSET(0x000CuL)
#define IRQ_SRC_CPU4SBSRC       IRQ_OFFSET(0x0010uL)
#define IRQ_SRC_CPU5SBSRC       IRQ_OFFSET(0x0014uL)
#define IRQ_SRC_BCUSPB			IRQ_OFFSET(0x0020uL)
#define IRQ_SRC_BCUBBB			IRQ_OFFSET(0x0024uL)
#define IRQ_SRC_AGBT			IRQ_OFFSET(0x002CuL)
#define IRQ_SRC_XBAR0           IRQ_OFFSET(0x0030uL)
#define IRQ_SRC_XBAR1           IRQ_OFFSET(0x0034uL)
#define IRQ_SRC_XBAR2           IRQ_OFFSET(0x0038uL)
#define IRQ_SRC_CERBERUS0       IRQ_OFFSET(0x0040uL+(0 * 0x4uL))
#define IRQ_SRC_CERBERUS1       IRQ_OFFSET(0x0040uL+(1 * 0x4uL))
#define IRQ_SRC_ASCLIN0TX       IRQ_OFFSET(0x0050uL+(0 * 0xCuL))
#define IRQ_SRC_ASCLIN1TX       IRQ_OFFSET(0x0050uL+(1 * 0xCuL))
#define IRQ_SRC_ASCLIN2TX       IRQ_OFFSET(0x0050uL+(2 * 0xCuL))
#define IRQ_SRC_ASCLIN3TX       IRQ_OFFSET(0x0050uL+(3 * 0xCuL))
#define IRQ_SRC_ASCLIN4TX       IRQ_OFFSET(0x0050uL+(4 * 0xCuL))
#define IRQ_SRC_ASCLIN5TX       IRQ_OFFSET(0x0050uL+(5 * 0xCuL))
#define IRQ_SRC_ASCLIN6TX       IRQ_OFFSET(0x0050uL+(6 * 0xCuL))
#define IRQ_SRC_ASCLIN7RX       IRQ_OFFSET(0x0054uL+(7 * 0xCuL))
#define IRQ_SRC_ASCLIN0ERR      IRQ_OFFSET(0x0058uL+(0 * 0xCuL))
#define IRQ_SRC_ASCLIN1ERR      IRQ_OFFSET(0x0058uL+(1 * 0xCuL))
#define IRQ_SRC_ASCLIN2ERR      IRQ_OFFSET(0x0058uL+(2 * 0xCuL))
#define IRQ_SRC_ASCLIN3ERR      IRQ_OFFSET(0x0058uL+(3 * 0xCuL))
#define IRQ_SRC_ASCLIN4ERR      IRQ_OFFSET(0x0058uL+(4 * 0xCuL))
#define IRQ_SRC_ASCLIN5ERR      IRQ_OFFSET(0x0058uL+(5 * 0xCuL))
#define IRQ_SRC_ASCLIN6ERR      IRQ_OFFSET(0x0058uL+(6 * 0xCuL))
#define IRQ_SRC_ASCLIN7ERR      IRQ_OFFSET(0x0058uL+(7 * 0xCuL))
#define IRQ_SRC_MTUDONE         IRQ_OFFSET(0x00BCuL)
#define IRQ_SRC_QSPI0TX         IRQ_OFFSET(0x00C0uL+(0 * 0x14uL))
#define IRQ_SRC_QSPI1TX         IRQ_OFFSET(0x00C0uL+(1 * 0x14uL))
#define IRQ_SRC_QSPI2TX         IRQ_OFFSET(0x00C0uL+(2 * 0x14uL))
#define IRQ_SRC_QSPI3TX         IRQ_OFFSET(0x00C0uL+(3 * 0x14uL))
#define IRQ_SRC_QSPI4TX         IRQ_OFFSET(0x00C0uL+(4 * 0x14uL))
#define IRQ_SRC_QSPI5TX         IRQ_OFFSET(0x00C0uL+(5 * 0x14uL))
#define IRQ_SRC_QSPI0RX         IRQ_OFFSET(0x00C4uL+(0 * 0x14uL))
#define IRQ_SRC_QSPI1RX         IRQ_OFFSET(0x00C4uL+(1 * 0x14uL))
#define IRQ_SRC_QSPI2RX         IRQ_OFFSET(0x00C4uL+(2 * 0x14uL))
#define IRQ_SRC_QSPI3RX         IRQ_OFFSET(0x00C4uL+(3 * 0x14uL))
#define IRQ_SRC_QSPI4RX         IRQ_OFFSET(0x00C4uL+(4 * 0x14uL))
#define IRQ_SRC_QSPI5RX         IRQ_OFFSET(0x00C4uL+(5 * 0x14uL))
#define IRQ_SRC_QSPI0ERR        IRQ_OFFSET(0x00C8uL+(0 * 0x14uL))
#define IRQ_SRC_QSPI1ERR        IRQ_OFFSET(0x00C8uL+(1 * 0x14uL))
#define IRQ_SRC_QSPI2ERR        IRQ_OFFSET(0x00C8uL+(2 * 0x14uL))
#define IRQ_SRC_QSPI3ERR        IRQ_OFFSET(0x00C8uL+(3 * 0x14uL))
#define IRQ_SRC_QSPI4ERR        IRQ_OFFSET(0x00C8uL+(4 * 0x14uL))
#define IRQ_SRC_QSPI5ERR        IRQ_OFFSET(0x00C8uL+(5 * 0x14uL))
#define IRQ_SRC_QSPI0PT         IRQ_OFFSET(0x00CCuL+(0 * 0x14uL))
#define IRQ_SRC_QSPI1PT         IRQ_OFFSET(0x00CCuL+(1 * 0x14uL))
#define IRQ_SRC_QSPI2PT         IRQ_OFFSET(0x00CCuL+(2 * 0x14uL))
#define IRQ_SRC_QSPI3PT         IRQ_OFFSET(0x00CCuL+(3 * 0x14uL))
#define IRQ_SRC_QSPI4PT         IRQ_OFFSET(0x00CCuL+(4 * 0x14uL))
#define IRQ_SRC_QSPI5PT         IRQ_OFFSET(0x00CCuL+(5 * 0x14uL))
#define IRQ_SRC_QSPI0U          IRQ_OFFSET(0x00D0uL+(0 * 0x14uL))
#define IRQ_SRC_QSPI1U          IRQ_OFFSET(0x00D0uL+(1 * 0x14uL))
#define IRQ_SRC_QSPI2U          IRQ_OFFSET(0x00D0uL+(2 * 0x14uL))
#define IRQ_SRC_QSPI3U          IRQ_OFFSET(0x00D0uL+(3 * 0x14uL))
#define IRQ_SRC_QSPI4U          IRQ_OFFSET(0x00D0uL+(4 * 0x14uL))
#define IRQ_SRC_QSPI5U          IRQ_OFFSET(0x00D0uL+(5 * 0x14uL))
#define IRQ_SRC_QSPI2HC         IRQ_OFFSET(0x0158uL+(2 * 0x4uL))
#define IRQ_SRC_QSPI3HC         IRQ_OFFSET(0x0158uL+(3 * 0x4uL))
#define IRQ_SRC_HSCT0           IRQ_OFFSET(0x0160uL)
#define IRQ_SRC_HSCT1           IRQ_OFFSET(0x0164uL)
#define IRQ_SRC_HSSL0COK0       IRQ_OFFSET(0x0170uL+(0 * 0x10uL))
#define IRQ_SRC_HSSL0COK1       IRQ_OFFSET(0x0170uL+(1 * 0x10uL))
#define IRQ_SRC_HSSL0COK2       IRQ_OFFSET(0x0170uL+(2 * 0x10uL))
#define IRQ_SRC_HSSL0COK3       IRQ_OFFSET(0x0170uL+(3 * 0x10uL))
#define IRQ_SRC_HSSL0RDI0       IRQ_OFFSET(0x0174uL+(0 * 0x10uL))
#define IRQ_SRC_HSSL0RDI1       IRQ_OFFSET(0x0174uL+(1 * 0x10uL))
#define IRQ_SRC_HSSL0RDI2       IRQ_OFFSET(0x0174uL+(2 * 0x10uL))
#define IRQ_SRC_HSSL0RDI3       IRQ_OFFSET(0x0174uL+(3 * 0x10uL))
#define IRQ_SRC_HSSL0ERR0       IRQ_OFFSET(0x0178uL+(0 * 0x10uL))
#define IRQ_SRC_HSSL0ERR1       IRQ_OFFSET(0x0178uL+(1 * 0x10uL))
#define IRQ_SRC_HSSL0ERR2       IRQ_OFFSET(0x0178uL+(2 * 0x10uL))
#define IRQ_SRC_HSSL0ERR3       IRQ_OFFSET(0x0178uL+(3 * 0x10uL))
#define IRQ_SRC_HSSL0TRG0       IRQ_OFFSET(0x017CuL+(0 * 0x10uL))
#define IRQ_SRC_HSSL0TRG1       IRQ_OFFSET(0x017CuL+(1 * 0x10uL))
#define IRQ_SRC_HSSL0TRG2       IRQ_OFFSET(0x017CuL+(2 * 0x10uL))
#define IRQ_SRC_HSSL0TRG3       IRQ_OFFSET(0x017CuL+(3 * 0x10uL))
#define IRQ_SRC_HSSL0EXI        IRQ_OFFSET(0x01B0uL)
#define IRQ_SRC_HSSL1COK0       IRQ_OFFSET(0x01B4uL+(0 * 0x10uL))
#define IRQ_SRC_HSSL1COK1       IRQ_OFFSET(0x01B4uL+(1 * 0x10uL))
#define IRQ_SRC_HSSL1COK2       IRQ_OFFSET(0x01B4uL+(2 * 0x10uL))
#define IRQ_SRC_HSSL1COK3       IRQ_OFFSET(0x01B4uL+(3 * 0x10uL))
#define IRQ_SRC_HSSL1RDI0       IRQ_OFFSET(0x01B8uL+(0 * 0x10uL))
#define IRQ_SRC_HSSL1RDI1       IRQ_OFFSET(0x01B8uL+(1 * 0x10uL))
#define IRQ_SRC_HSSL1RDI2       IRQ_OFFSET(0x01B8uL+(2 * 0x10uL))
#define IRQ_SRC_HSSL1RDI3       IRQ_OFFSET(0x01B8uL+(3 * 0x10uL))
#define IRQ_SRC_HSSL1ERR0       IRQ_OFFSET(0x01BCuL+(0 * 0x10uL))
#define IRQ_SRC_HSSL1ERR1       IRQ_OFFSET(0x01BCuL+(1 * 0x10uL))
#define IRQ_SRC_HSSL1ERR2       IRQ_OFFSET(0x01BCuL+(2 * 0x10uL))
#define IRQ_SRC_HSSL1ERR3       IRQ_OFFSET(0x01BCuL+(3 * 0x10uL))
#define IRQ_SRC_HSSL1TRG0       IRQ_OFFSET(0x01C0uL+(0 * 0x10uL))
#define IRQ_SRC_HSSL1TRG1       IRQ_OFFSET(0x01C0uL+(1 * 0x10uL))
#define IRQ_SRC_HSSL1TRG2       IRQ_OFFSET(0x01C0uL+(2 * 0x10uL))
#define IRQ_SRC_HSSL1TRG3       IRQ_OFFSET(0x01C0uL+(3 * 0x10uL))
#define IRQ_SRC_HSSL1EXI        IRQ_OFFSET(0x01F4uL)
#define IRQ_SRC_I2C0DTR         IRQ_OFFSET(0x0200uL)
#define IRQ_SRC_I2C0ERR         IRQ_OFFSET(0x0204uL)
#define IRQ_SRC_I2C0P           IRQ_OFFSET(0x0208uL)
#define IRQ_SRC_I2C1DTR         IRQ_OFFSET(0x0210uL)
#define IRQ_SRC_I2C1ERR         IRQ_OFFSET(0x0214uL)
#define IRQ_SRC_I2C1P           IRQ_OFFSET(0x0218uL)
#define IRQ_SRC_SENT0           IRQ_OFFSET(0x0220uL+(0 * 0x4uL))
#define IRQ_SRC_SENT1           IRQ_OFFSET(0x0220uL+(1 * 0x4uL))
#define IRQ_SRC_SENT2           IRQ_OFFSET(0x0220uL+(2 * 0x4uL))
#define IRQ_SRC_SENT3           IRQ_OFFSET(0x0220uL+(3 * 0x4uL))
#define IRQ_SRC_SENT4           IRQ_OFFSET(0x0220uL+(4 * 0x4uL))
#define IRQ_SRC_SENT5           IRQ_OFFSET(0x0220uL+(5 * 0x4uL))
#define IRQ_SRC_SENT6           IRQ_OFFSET(0x0220uL+(6 * 0x4uL))
#define IRQ_SRC_SENT7           IRQ_OFFSET(0x0220uL+(7 * 0x4uL))
#define IRQ_SRC_SENT8           IRQ_OFFSET(0x0220uL+(8 * 0x4uL))
#define IRQ_SRC_SENT9           IRQ_OFFSET(0x0220uL+(9 * 0x4uL))
#define IRQ_SRC_MSC0SR0         IRQ_OFFSET(0x0250uL+(0 * 0x14uL))
#define IRQ_SRC_MSC1SR0         IRQ_OFFSET(0x0250uL+(1 * 0x14uL))
#define IRQ_SRC_MSC2SR0         IRQ_OFFSET(0x0250uL+(2 * 0x14uL))
#define IRQ_SRC_MSC3SR0         IRQ_OFFSET(0x0250uL+(3 * 0x14uL))
#define IRQ_SRC_MSC0SR1         IRQ_OFFSET(0x0254uL+(0 * 0x14uL))
#define IRQ_SRC_MSC1SR1         IRQ_OFFSET(0x0254uL+(1 * 0x14uL))
#define IRQ_SRC_MSC2SR1         IRQ_OFFSET(0x0254uL+(2 * 0x14uL))
#define IRQ_SRC_MSC3SR1         IRQ_OFFSET(0x0254uL+(3 * 0x14uL))
#define IRQ_SRC_MSC0SR2         IRQ_OFFSET(0x0258uL+(0 * 0x14uL))
#define IRQ_SRC_MSC1SR2         IRQ_OFFSET(0x0258uL+(1 * 0x14uL))
#define IRQ_SRC_MSC2SR2         IRQ_OFFSET(0x0258uL+(2 * 0x14uL))
#define IRQ_SRC_MSC3SR2         IRQ_OFFSET(0x0258uL+(3 * 0x14uL))
#define IRQ_SRC_MSC0SR3         IRQ_OFFSET(0x025CuL+(0 * 0x14uL))
#define IRQ_SRC_MSC1SR3         IRQ_OFFSET(0x025CuL+(1 * 0x14uL))
#define IRQ_SRC_MSC2SR3         IRQ_OFFSET(0x025CuL+(2 * 0x14uL))
#define IRQ_SRC_MSC3SR3         IRQ_OFFSET(0x025CuL+(3 * 0x14uL))
#define IRQ_SRC_MSC0SR4         IRQ_OFFSET(0x0260uL+(0 * 0x14uL))
#define IRQ_SRC_MSC1SR4         IRQ_OFFSET(0x0260uL+(1 * 0x14uL))
#define IRQ_SRC_MSC2SR4         IRQ_OFFSET(0x0260uL+(2 * 0x14uL))
#define IRQ_SRC_MSC3SR4         IRQ_OFFSET(0x0260uL+(3 * 0x14uL))
#define IRQ_SRC_CCU60SR0        IRQ_OFFSET(0x02A0uL+(0 * 0x10uL))
#define IRQ_SRC_CCU61SR0        IRQ_OFFSET(0x02A0uL+(1 * 0x10uL))
#define IRQ_SRC_CCU60SR1        IRQ_OFFSET(0x02A4uL+(0 * 0x10uL))
#define IRQ_SRC_CCU61SR1        IRQ_OFFSET(0x02A4uL+(1 * 0x10uL))
#define IRQ_SRC_CCU60SR2        IRQ_OFFSET(0x02A8uL+(0 * 0x10uL))
#define IRQ_SRC_CCU61SR2        IRQ_OFFSET(0x02A8uL+(1 * 0x10uL))
#define IRQ_SRC_CCU60SR3        IRQ_OFFSET(0x02ACuL+(0 * 0x10uL))
#define IRQ_SRC_CCU61SR3        IRQ_OFFSET(0x02ACuL+(1 * 0x10uL))
#define IRQ_SRC_GPT120CIRQ      IRQ_OFFSET(0x02E0uL)
#define IRQ_SRC_GPT120T2        IRQ_OFFSET(0x02E4uL)
#define IRQ_SRC_GPT120T3        IRQ_OFFSET(0x02E8uL)
#define IRQ_SRC_GPT120T4        IRQ_OFFSET(0x02ECuL)
#define IRQ_SRC_GPT120T5        IRQ_OFFSET(0x02F0uL)
#define IRQ_SRC_GPT120T6        IRQ_OFFSET(0x02F4uL)
#define IRQ_SRC_STM0SR0         IRQ_OFFSET(0x0300uL+(0 * 0x8uL))
#define IRQ_SRC_STM1SR0         IRQ_OFFSET(0x0300uL+(1 * 0x8uL))
#define IRQ_SRC_STM2SR0         IRQ_OFFSET(0x0300uL+(2 * 0x8uL))
#define IRQ_SRC_STM3SR0         IRQ_OFFSET(0x0300uL+(3 * 0x8uL))
#define IRQ_SRC_STM4SR0         IRQ_OFFSET(0x0300uL+(4 * 0x8uL))
#define IRQ_SRC_STM5SR0         IRQ_OFFSET(0x0300uL+(5 * 0x8uL))
#define IRQ_SRC_STM0SR1         IRQ_OFFSET(0x0304uL+(0 * 0x8uL))
#define IRQ_SRC_STM1SR1         IRQ_OFFSET(0x0304uL+(1 * 0x8uL))
#define IRQ_SRC_STM2SR1         IRQ_OFFSET(0x0304uL+(2 * 0x8uL))
#define IRQ_SRC_STM3SR1         IRQ_OFFSET(0x0304uL+(3 * 0x8uL))
#define IRQ_SRC_STM4SR1         IRQ_OFFSET(0x0304uL+(4 * 0x8uL))
#define IRQ_SRC_STM5SR1         IRQ_OFFSET(0x0304uL+(5 * 0x8uL))
#define IRQ_SRC_FCE0            IRQ_OFFSET(0x0330uL)
#define IRQ_SRC_DMAERR          IRQ_OFFSET(0x0340uL)
#define IRQ_SRC_DMACH0          IRQ_OFFSET(0x0350uL+(0 * 0x4uL))
#define IRQ_SRC_DMACH1          IRQ_OFFSET(0x0350uL+(1 * 0x4uL))
#define IRQ_SRC_DMACH2          IRQ_OFFSET(0x0350uL+(2 * 0x4uL))
#define IRQ_SRC_DMACH3          IRQ_OFFSET(0x0350uL+(3 * 0x4uL))
#define IRQ_SRC_DMACH4          IRQ_OFFSET(0x0350uL+(4 * 0x4uL))
#define IRQ_SRC_DMACH5          IRQ_OFFSET(0x0350uL+(5 * 0x4uL))
#define IRQ_SRC_DMACH6          IRQ_OFFSET(0x0350uL+(6 * 0x4uL))
#define IRQ_SRC_DMACH7          IRQ_OFFSET(0x0350uL+(7 * 0x4uL))
#define IRQ_SRC_DMACH8          IRQ_OFFSET(0x0350uL+(8 * 0x4uL))
#define IRQ_SRC_DMACH9          IRQ_OFFSET(0x0350uL+(9 * 0x4uL))
#define IRQ_SRC_DMACH10         IRQ_OFFSET(0x0350uL+(10 * 0x4uL))
#define IRQ_SRC_DMACH11         IRQ_OFFSET(0x0350uL+(11 * 0x4uL))
#define IRQ_SRC_DMACH12         IRQ_OFFSET(0x0350uL+(12 * 0x4uL))
#define IRQ_SRC_DMACH13         IRQ_OFFSET(0x0350uL+(13 * 0x4uL))
#define IRQ_SRC_DMACH14         IRQ_OFFSET(0x0350uL+(14 * 0x4uL))
#define IRQ_SRC_DMACH15         IRQ_OFFSET(0x0350uL+(15 * 0x4uL))
#define IRQ_SRC_DMACH16         IRQ_OFFSET(0x0350uL+(16 * 0x4uL))
#define IRQ_SRC_DMACH17         IRQ_OFFSET(0x0350uL+(17 * 0x4uL))
#define IRQ_SRC_DMACH18         IRQ_OFFSET(0x0350uL+(18 * 0x4uL))
#define IRQ_SRC_DMACH19         IRQ_OFFSET(0x0350uL+(19 * 0x4uL))
#define IRQ_SRC_DMACH20         IRQ_OFFSET(0x0350uL+(20 * 0x4uL))
#define IRQ_SRC_DMACH21         IRQ_OFFSET(0x0350uL+(21 * 0x4uL))
#define IRQ_SRC_DMACH22         IRQ_OFFSET(0x0350uL+(22 * 0x4uL))
#define IRQ_SRC_DMACH23         IRQ_OFFSET(0x0350uL+(23 * 0x4uL))
#define IRQ_SRC_DMACH24         IRQ_OFFSET(0x0350uL+(24 * 0x4uL))
#define IRQ_SRC_DMACH25         IRQ_OFFSET(0x0350uL+(25 * 0x4uL))
#define IRQ_SRC_DMACH26         IRQ_OFFSET(0x0350uL+(26 * 0x4uL))
#define IRQ_SRC_DMACH27         IRQ_OFFSET(0x0350uL+(27 * 0x4uL))
#define IRQ_SRC_DMACH28         IRQ_OFFSET(0x0350uL+(28 * 0x4uL))
#define IRQ_SRC_DMACH29         IRQ_OFFSET(0x0350uL+(29 * 0x4uL))
#define IRQ_SRC_DMACH30         IRQ_OFFSET(0x0350uL+(30 * 0x4uL))
#define IRQ_SRC_DMACH31         IRQ_OFFSET(0x0350uL+(31 * 0x4uL))
#define IRQ_SRC_DMACH32         IRQ_OFFSET(0x0350uL+(32 * 0x4uL))
#define IRQ_SRC_DMACH33         IRQ_OFFSET(0x0350uL+(33 * 0x4uL))
#define IRQ_SRC_DMACH34         IRQ_OFFSET(0x0350uL+(34 * 0x4uL))
#define IRQ_SRC_DMACH35         IRQ_OFFSET(0x0350uL+(35 * 0x4uL))
#define IRQ_SRC_DMACH36         IRQ_OFFSET(0x0350uL+(36 * 0x4uL))
#define IRQ_SRC_DMACH37         IRQ_OFFSET(0x0350uL+(37 * 0x4uL))
#define IRQ_SRC_DMACH38         IRQ_OFFSET(0x0350uL+(38 * 0x4uL))
#define IRQ_SRC_DMACH39         IRQ_OFFSET(0x0350uL+(39 * 0x4uL))
#define IRQ_SRC_DMACH40         IRQ_OFFSET(0x0350uL+(40 * 0x4uL))
#define IRQ_SRC_DMACH41         IRQ_OFFSET(0x0350uL+(41 * 0x4uL))
#define IRQ_SRC_DMACH42         IRQ_OFFSET(0x0350uL+(42 * 0x4uL))
#define IRQ_SRC_DMACH43         IRQ_OFFSET(0x0350uL+(43 * 0x4uL))
#define IRQ_SRC_DMACH44         IRQ_OFFSET(0x0350uL+(44 * 0x4uL))
#define IRQ_SRC_DMACH45         IRQ_OFFSET(0x0350uL+(45 * 0x4uL))
#define IRQ_SRC_DMACH46         IRQ_OFFSET(0x0350uL+(46 * 0x4uL))
#define IRQ_SRC_DMACH47         IRQ_OFFSET(0x0350uL+(47 * 0x4uL))
#define IRQ_SRC_DMACH48         IRQ_OFFSET(0x0350uL+(48 * 0x4uL))
#define IRQ_SRC_DMACH49         IRQ_OFFSET(0x0350uL+(49 * 0x4uL))
#define IRQ_SRC_DMACH50         IRQ_OFFSET(0x0350uL+(50 * 0x4uL))
#define IRQ_SRC_DMACH51         IRQ_OFFSET(0x0350uL+(51 * 0x4uL))
#define IRQ_SRC_DMACH52         IRQ_OFFSET(0x0350uL+(52 * 0x4uL))
#define IRQ_SRC_DMACH53         IRQ_OFFSET(0x0350uL+(53 * 0x4uL))
#define IRQ_SRC_DMACH54         IRQ_OFFSET(0x0350uL+(54 * 0x4uL))
#define IRQ_SRC_DMACH55         IRQ_OFFSET(0x0350uL+(55 * 0x4uL))
#define IRQ_SRC_DMACH56         IRQ_OFFSET(0x0350uL+(56 * 0x4uL))
#define IRQ_SRC_DMACH57         IRQ_OFFSET(0x0350uL+(57 * 0x4uL))
#define IRQ_SRC_DMACH58         IRQ_OFFSET(0x0350uL+(58 * 0x4uL))
#define IRQ_SRC_DMACH59         IRQ_OFFSET(0x0350uL+(59 * 0x4uL))
#define IRQ_SRC_DMACH60         IRQ_OFFSET(0x0350uL+(60 * 0x4uL))
#define IRQ_SRC_DMACH61         IRQ_OFFSET(0x0350uL+(61 * 0x4uL))
#define IRQ_SRC_DMACH62         IRQ_OFFSET(0x0350uL+(62 * 0x4uL))
#define IRQ_SRC_DMACH63         IRQ_OFFSET(0x0350uL+(63 * 0x4uL))
#define IRQ_SRC_DMACH64         IRQ_OFFSET(0x0350uL+(64 * 0x4uL))
#define IRQ_SRC_DMACH65         IRQ_OFFSET(0x0350uL+(65 * 0x4uL))
#define IRQ_SRC_DMACH66         IRQ_OFFSET(0x0350uL+(66 * 0x4uL))
#define IRQ_SRC_DMACH67         IRQ_OFFSET(0x0350uL+(67 * 0x4uL))
#define IRQ_SRC_DMACH68         IRQ_OFFSET(0x0350uL+(68 * 0x4uL))
#define IRQ_SRC_DMACH69         IRQ_OFFSET(0x0350uL+(69 * 0x4uL))
#define IRQ_SRC_DMACH70         IRQ_OFFSET(0x0350uL+(70 * 0x4uL))
#define IRQ_SRC_DMACH71         IRQ_OFFSET(0x0350uL+(71 * 0x4uL))
#define IRQ_SRC_DMACH72         IRQ_OFFSET(0x0350uL+(72 * 0x4uL))
#define IRQ_SRC_DMACH73         IRQ_OFFSET(0x0350uL+(73 * 0x4uL))
#define IRQ_SRC_DMACH74         IRQ_OFFSET(0x0350uL+(74 * 0x4uL))
#define IRQ_SRC_DMACH75         IRQ_OFFSET(0x0350uL+(75 * 0x4uL))
#define IRQ_SRC_DMACH76         IRQ_OFFSET(0x0350uL+(76 * 0x4uL))
#define IRQ_SRC_DMACH77         IRQ_OFFSET(0x0350uL+(77 * 0x4uL))
#define IRQ_SRC_DMACH78         IRQ_OFFSET(0x0350uL+(78 * 0x4uL))
#define IRQ_SRC_DMACH79         IRQ_OFFSET(0x0350uL+(79 * 0x4uL))
#define IRQ_SRC_DMACH80         IRQ_OFFSET(0x0350uL+(80 * 0x4uL))
#define IRQ_SRC_DMACH81         IRQ_OFFSET(0x0350uL+(81 * 0x4uL))
#define IRQ_SRC_DMACH82         IRQ_OFFSET(0x0350uL+(82 * 0x4uL))
#define IRQ_SRC_DMACH83         IRQ_OFFSET(0x0350uL+(83 * 0x4uL))
#define IRQ_SRC_DMACH84         IRQ_OFFSET(0x0350uL+(84 * 0x4uL))
#define IRQ_SRC_DMACH85         IRQ_OFFSET(0x0350uL+(85 * 0x4uL))
#define IRQ_SRC_DMACH86         IRQ_OFFSET(0x0350uL+(86 * 0x4uL))
#define IRQ_SRC_DMACH87         IRQ_OFFSET(0x0350uL+(87 * 0x4uL))
#define IRQ_SRC_DMACH88         IRQ_OFFSET(0x0350uL+(88 * 0x4uL))
#define IRQ_SRC_DMACH89         IRQ_OFFSET(0x0350uL+(89 * 0x4uL))
#define IRQ_SRC_DMACH90         IRQ_OFFSET(0x0350uL+(90 * 0x4uL))
#define IRQ_SRC_DMACH91         IRQ_OFFSET(0x0350uL+(91 * 0x4uL))
#define IRQ_SRC_DMACH92         IRQ_OFFSET(0x0350uL+(92 * 0x4uL))
#define IRQ_SRC_DMACH93         IRQ_OFFSET(0x0350uL+(93 * 0x4uL))
#define IRQ_SRC_DMACH94         IRQ_OFFSET(0x0350uL+(94 * 0x4uL))
#define IRQ_SRC_DMACH95         IRQ_OFFSET(0x0350uL+(95 * 0x4uL))
#define IRQ_SRC_DMACH96         IRQ_OFFSET(0x0350uL+(96 * 0x4uL))
#define IRQ_SRC_DMACH97         IRQ_OFFSET(0x0350uL+(97 * 0x4uL))
#define IRQ_SRC_DMACH98         IRQ_OFFSET(0x0350uL+(98 * 0x4uL))
#define IRQ_SRC_DMACH99         IRQ_OFFSET(0x0350uL+(99 * 0x4uL))
#define IRQ_SRC_DMACH100        IRQ_OFFSET(0x0350uL+(100 * 0x4uL))
#define IRQ_SRC_DMACH101        IRQ_OFFSET(0x0350uL+(101 * 0x4uL))
#define IRQ_SRC_DMACH102        IRQ_OFFSET(0x0350uL+(102 * 0x4uL))
#define IRQ_SRC_DMACH103        IRQ_OFFSET(0x0350uL+(103 * 0x4uL))
#define IRQ_SRC_DMACH104        IRQ_OFFSET(0x0350uL+(104 * 0x4uL))
#define IRQ_SRC_DMACH105        IRQ_OFFSET(0x0350uL+(105 * 0x4uL))
#define IRQ_SRC_DMACH106        IRQ_OFFSET(0x0350uL+(106 * 0x4uL))
#define IRQ_SRC_DMACH107        IRQ_OFFSET(0x0350uL+(107 * 0x4uL))
#define IRQ_SRC_DMACH108        IRQ_OFFSET(0x0350uL+(108 * 0x4uL))
#define IRQ_SRC_DMACH109        IRQ_OFFSET(0x0350uL+(109 * 0x4uL))
#define IRQ_SRC_DMACH110        IRQ_OFFSET(0x0350uL+(110 * 0x4uL))
#define IRQ_SRC_DMACH111        IRQ_OFFSET(0x0350uL+(111 * 0x4uL))
#define IRQ_SRC_DMACH112        IRQ_OFFSET(0x0350uL+(112 * 0x4uL))
#define IRQ_SRC_DMACH113        IRQ_OFFSET(0x0350uL+(113 * 0x4uL))
#define IRQ_SRC_DMACH114        IRQ_OFFSET(0x0350uL+(114 * 0x4uL))
#define IRQ_SRC_DMACH115        IRQ_OFFSET(0x0350uL+(115 * 0x4uL))
#define IRQ_SRC_DMACH116        IRQ_OFFSET(0x0350uL+(116 * 0x4uL))
#define IRQ_SRC_DMACH117        IRQ_OFFSET(0x0350uL+(117 * 0x4uL))
#define IRQ_SRC_DMACH118        IRQ_OFFSET(0x0350uL+(118 * 0x4uL))
#define IRQ_SRC_DMACH119        IRQ_OFFSET(0x0350uL+(119 * 0x4uL))
#define IRQ_SRC_DMACH120        IRQ_OFFSET(0x0350uL+(120 * 0x4uL))
#define IRQ_SRC_DMACH121        IRQ_OFFSET(0x0350uL+(121 * 0x4uL))
#define IRQ_SRC_DMACH122        IRQ_OFFSET(0x0350uL+(122 * 0x4uL))
#define IRQ_SRC_DMACH123        IRQ_OFFSET(0x0350uL+(123 * 0x4uL))
#define IRQ_SRC_DMACH124        IRQ_OFFSET(0x0350uL+(124 * 0x4uL))
#define IRQ_SRC_DMACH125        IRQ_OFFSET(0x0350uL+(125 * 0x4uL))
#define IRQ_SRC_DMACH126        IRQ_OFFSET(0x0350uL+(126 * 0x4uL))
#define IRQ_SRC_DMACH127        IRQ_OFFSET(0x0350uL+(127 * 0x4uL))
#define IRQ_SRC_PDMAERR         IRQ_OFFSET(0x0550uL)
#define IRQ_SRC_PDMARDY         IRQ_OFFSET(0x0554uL)
#define IRQ_SRC_ETH             IRQ_OFFSET(0x0560uL)
#define IRQ_SRC_CAN0INT0        IRQ_OFFSET(0x0580uL+(0 * 0x4uL))
#define IRQ_SRC_CAN0INT1        IRQ_OFFSET(0x0580uL+(1 * 0x4uL))
#define IRQ_SRC_CAN0INT2        IRQ_OFFSET(0x0580uL+(2 * 0x4uL))
#define IRQ_SRC_CAN0INT3        IRQ_OFFSET(0x0580uL+(3 * 0x4uL))
#define IRQ_SRC_CAN0INT4        IRQ_OFFSET(0x0580uL+(4 * 0x4uL))
#define IRQ_SRC_CAN0INT5        IRQ_OFFSET(0x0580uL+(5 * 0x4uL))
#define IRQ_SRC_CAN0INT6        IRQ_OFFSET(0x0580uL+(6 * 0x4uL))
#define IRQ_SRC_CAN0INT7        IRQ_OFFSET(0x0580uL+(7 * 0x4uL))
#define IRQ_SRC_CAN0INT8        IRQ_OFFSET(0x0580uL+(8 * 0x4uL))
#define IRQ_SRC_CAN0INT9        IRQ_OFFSET(0x0580uL+(9 * 0x4uL))
#define IRQ_SRC_CAN0INT10       IRQ_OFFSET(0x0580uL+(10 * 0x4uL))
#define IRQ_SRC_CAN0INT11       IRQ_OFFSET(0x0580uL+(11 * 0x4uL))
#define IRQ_SRC_CAN0INT12       IRQ_OFFSET(0x0580uL+(12 * 0x4uL))
#define IRQ_SRC_CAN0INT13       IRQ_OFFSET(0x0580uL+(13 * 0x4uL))
#define IRQ_SRC_CAN0INT14       IRQ_OFFSET(0x0580uL+(14 * 0x4uL))
#define IRQ_SRC_CAN0INT15       IRQ_OFFSET(0x0580uL+(15 * 0x4uL))
#define IRQ_SRC_CAN1INT0        IRQ_OFFSET(0x05C0uL+(0 * 0x4uL))
#define IRQ_SRC_CAN1INT1        IRQ_OFFSET(0x05C0uL+(1 * 0x4uL))
#define IRQ_SRC_CAN1INT2        IRQ_OFFSET(0x05C0uL+(2 * 0x4uL))
#define IRQ_SRC_CAN1INT3        IRQ_OFFSET(0x05C0uL+(3 * 0x4uL))
#define IRQ_SRC_CAN1INT4        IRQ_OFFSET(0x05C0uL+(4 * 0x4uL))
#define IRQ_SRC_CAN1INT5        IRQ_OFFSET(0x05C0uL+(5 * 0x4uL))
#define IRQ_SRC_CAN1INT6        IRQ_OFFSET(0x05C0uL+(6 * 0x4uL))
#define IRQ_SRC_CAN1INT7        IRQ_OFFSET(0x05C0uL+(7 * 0x4uL))
#define IRQ_SRC_CAN1INT8        IRQ_OFFSET(0x05C0uL+(8 * 0x4uL))
#define IRQ_SRC_CAN1INT9        IRQ_OFFSET(0x05C0uL+(9 * 0x4uL))
#define IRQ_SRC_CAN1INT10       IRQ_OFFSET(0x05C0uL+(10 * 0x4uL))
#define IRQ_SRC_CAN1INT11       IRQ_OFFSET(0x05C0uL+(11 * 0x4uL))
#define IRQ_SRC_CAN1INT12       IRQ_OFFSET(0x05C0uL+(12 * 0x4uL))
#define IRQ_SRC_CAN1INT13       IRQ_OFFSET(0x05C0uL+(13 * 0x4uL))
#define IRQ_SRC_CAN1INT14       IRQ_OFFSET(0x05C0uL+(14 * 0x4uL))
#define IRQ_SRC_CAN1INT15       IRQ_OFFSET(0x05C0uL+(15 * 0x4uL))
#define IRQ_SRC_CAN2INT0        IRQ_OFFSET(0x0600uL+(0 * 0x4uL))
#define IRQ_SRC_CAN2INT1        IRQ_OFFSET(0x0600uL+(1 * 0x4uL))
#define IRQ_SRC_CAN2INT2        IRQ_OFFSET(0x0600uL+(2 * 0x4uL))
#define IRQ_SRC_CAN2INT3        IRQ_OFFSET(0x0600uL+(3 * 0x4uL))
#define IRQ_SRC_CAN2INT4        IRQ_OFFSET(0x0600uL+(4 * 0x4uL))
#define IRQ_SRC_CAN2INT5        IRQ_OFFSET(0x0600uL+(5 * 0x4uL))
#define IRQ_SRC_CAN2INT6        IRQ_OFFSET(0x0600uL+(6 * 0x4uL))
#define IRQ_SRC_CAN2INT7        IRQ_OFFSET(0x0600uL+(7 * 0x4uL))
#define IRQ_SRC_CAN2INT8        IRQ_OFFSET(0x0600uL+(8 * 0x4uL))
#define IRQ_SRC_CAN2INT9        IRQ_OFFSET(0x0600uL+(9 * 0x4uL))
#define IRQ_SRC_CAN2INT10       IRQ_OFFSET(0x0600uL+(10 * 0x4uL))
#define IRQ_SRC_CAN2INT11       IRQ_OFFSET(0x0600uL+(11 * 0x4uL))
#define IRQ_SRC_CAN2INT12       IRQ_OFFSET(0x0600uL+(12 * 0x4uL))
#define IRQ_SRC_CAN2INT13       IRQ_OFFSET(0x0600uL+(13 * 0x4uL))
#define IRQ_SRC_CAN2INT14       IRQ_OFFSET(0x0600uL+(14 * 0x4uL))
#define IRQ_SRC_CAN2INT15       IRQ_OFFSET(0x0600uL+(15 * 0x4uL))
#define IRQ_SRC_VADCG0SR0       IRQ_OFFSET(0x0670uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG0SR1       IRQ_OFFSET(0x0670uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG0SR2       IRQ_OFFSET(0x0670uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG0SR3       IRQ_OFFSET(0x0670uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG1SR0       IRQ_OFFSET(0x0680uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG1SR1       IRQ_OFFSET(0x0680uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG1SR2       IRQ_OFFSET(0x0680uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG1SR3       IRQ_OFFSET(0x0680uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG2SR0       IRQ_OFFSET(0x0690uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG2SR1       IRQ_OFFSET(0x0690uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG2SR2       IRQ_OFFSET(0x0690uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG2SR3       IRQ_OFFSET(0x0690uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG3SR0       IRQ_OFFSET(0x06A0uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG3SR1       IRQ_OFFSET(0x06A0uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG3SR2       IRQ_OFFSET(0x06A0uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG3SR3       IRQ_OFFSET(0x06A0uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG4SR0       IRQ_OFFSET(0x06B0uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG4SR1       IRQ_OFFSET(0x06B0uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG4SR2       IRQ_OFFSET(0x06B0uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG4SR3       IRQ_OFFSET(0x06B0uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG5SR0       IRQ_OFFSET(0x06C0uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG5SR1       IRQ_OFFSET(0x06C0uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG5SR2       IRQ_OFFSET(0x06C0uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG5SR3       IRQ_OFFSET(0x06C0uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG6SR0       IRQ_OFFSET(0x06D0uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG6SR1       IRQ_OFFSET(0x06D0uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG6SR2       IRQ_OFFSET(0x06D0uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG6SR3       IRQ_OFFSET(0x06D0uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG7SR0       IRQ_OFFSET(0x06E0uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG7SR1       IRQ_OFFSET(0x06E0uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG7SR2       IRQ_OFFSET(0x06E0uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG7SR3       IRQ_OFFSET(0x06E0uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG8SR0       IRQ_OFFSET(0x06F0uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG8SR1       IRQ_OFFSET(0x06F0uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG8SR2       IRQ_OFFSET(0x06F0uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG8SR3       IRQ_OFFSET(0x06F0uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG9SR0       IRQ_OFFSET(0x0700uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG9SR1       IRQ_OFFSET(0x0700uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG9SR2       IRQ_OFFSET(0x0700uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG9SR3       IRQ_OFFSET(0x0700uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG10SR0      IRQ_OFFSET(0x0710uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG10SR1      IRQ_OFFSET(0x0710uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG10SR2      IRQ_OFFSET(0x0710uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG10SR3      IRQ_OFFSET(0x0710uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG11SR0      IRQ_OFFSET(0x0720uL+(0 * 0x4uL))
#define IRQ_SRC_VADCG11SR1      IRQ_OFFSET(0x0720uL+(1 * 0x4uL))
#define IRQ_SRC_VADCG11SR2      IRQ_OFFSET(0x0720uL+(2 * 0x4uL))
#define IRQ_SRC_VADCG11SR3      IRQ_OFFSET(0x0720uL+(3 * 0x4uL))
#define IRQ_SRC_VADCG12SR0      IRQ_OFFSET(0x0730uL)
#define IRQ_SRC_VADCG13SR0      IRQ_OFFSET(0x0734uL)
#define IRQ_SRC_VADCG14SR0      IRQ_OFFSET(0x0738uL)
#define IRQ_SRC_VADCG15SR0      IRQ_OFFSET(0x073CuL)
#define IRQ_SRC_VADCG16SR0      IRQ_OFFSET(0x0740uL)
#define IRQ_SRC_VADCG17SR0      IRQ_OFFSET(0x0744uL)
#define IRQ_SRC_VADCG18SR0      IRQ_OFFSET(0x0748uL)
#define IRQ_SRC_VADCG19SR0      IRQ_OFFSET(0x074CuL)
#define IRQ_SRC_VADCC0SR0       IRQ_OFFSET(0x0750uL+(0 * 0x4uL))
#define IRQ_SRC_VADCC0SR1       IRQ_OFFSET(0x0750uL+(1 * 0x4uL))
#define IRQ_SRC_VADCC0SR2       IRQ_OFFSET(0x0750uL+(2 * 0x4uL))
#define IRQ_SRC_VADCC0SR3       IRQ_OFFSET(0x0750uL+(3 * 0x4uL))
#define IRQ_SRC_VADCC1SR0       IRQ_OFFSET(0x0760uL+(0 * 0x4uL))
#define IRQ_SRC_VADCC1SR1       IRQ_OFFSET(0x0760uL+(1 * 0x4uL))
#define IRQ_SRC_VADCC1SR2       IRQ_OFFSET(0x0760uL+(2 * 0x4uL))
#define IRQ_SRC_VADCC1SR3       IRQ_OFFSET(0x0760uL+(3 * 0x4uL))
#define IRQ_SRC_DSADCSRM0       IRQ_OFFSET(0x0770uL+(0 * 0x8uL))
#define IRQ_SRC_DSADCSRM1       IRQ_OFFSET(0x0770uL+(1 * 0x8uL))
#define IRQ_SRC_DSADCSRM2       IRQ_OFFSET(0x0770uL+(2 * 0x8uL))
#define IRQ_SRC_DSADCSRM3       IRQ_OFFSET(0x0770uL+(3 * 0x8uL))
#define IRQ_SRC_DSADCSRM4       IRQ_OFFSET(0x0770uL+(4 * 0x8uL))
#define IRQ_SRC_DSADCSRM5       IRQ_OFFSET(0x0770uL+(5 * 0x8uL))
#define IRQ_SRC_DSADCSRM6       IRQ_OFFSET(0x0770uL+(6 * 0x8uL))
#define IRQ_SRC_DSADCSRM7       IRQ_OFFSET(0x0770uL+(7 * 0x8uL))
#define IRQ_SRC_DSADCSRM8       IRQ_OFFSET(0x0770uL+(8 * 0x8uL))
#define IRQ_SRC_DSADCSRM9       IRQ_OFFSET(0x0770uL+(9 * 0x8uL))
#define IRQ_SRC_DSADCSRM10      IRQ_OFFSET(0x0770uL+(10 * 0x8uL))
#define IRQ_SRC_DSADCSRM11      IRQ_OFFSET(0x0770uL+(11 * 0x8uL))
#define IRQ_SRC_DSADCSRM12      IRQ_OFFSET(0x0770uL+(12 * 0x8uL))
#define IRQ_SRC_DSADCSRM13      IRQ_OFFSET(0x0770uL+(13 * 0x8uL))
#define IRQ_SRC_DSADCSRA0       IRQ_OFFSET(0x0774uL+(0 * 0x8uL))
#define IRQ_SRC_DSADCSRA1       IRQ_OFFSET(0x0774uL+(1 * 0x8uL))
#define IRQ_SRC_DSADCSRA2       IRQ_OFFSET(0x0774uL+(2 * 0x8uL))
#define IRQ_SRC_DSADCSRA3       IRQ_OFFSET(0x0774uL+(3 * 0x8uL))
#define IRQ_SRC_DSADCSRA4       IRQ_OFFSET(0x0774uL+(4 * 0x8uL))
#define IRQ_SRC_DSADCSRA5       IRQ_OFFSET(0x0774uL+(5 * 0x8uL))
#define IRQ_SRC_DSADCSRA6       IRQ_OFFSET(0x0774uL+(6 * 0x8uL))
#define IRQ_SRC_DSADCSRA7       IRQ_OFFSET(0x0774uL+(7 * 0x8uL))
#define IRQ_SRC_DSADCSRA8       IRQ_OFFSET(0x0774uL+(8 * 0x8uL))
#define IRQ_SRC_DSADCSRA9       IRQ_OFFSET(0x0774uL+(9 * 0x8uL))
#define IRQ_SRC_DSADCSRA10      IRQ_OFFSET(0x0774uL+(10 * 0x8uL))
#define IRQ_SRC_DSADCSRA11      IRQ_OFFSET(0x0774uL+(11 * 0x8uL))
#define IRQ_SRC_DSADCSRA12      IRQ_OFFSET(0x0774uL+(12 * 0x8uL))
#define IRQ_SRC_DSADCSRA13      IRQ_OFFSET(0x0774uL+(13 * 0x8uL))
#define IRQ_SRC_ERAY0INT0       IRQ_OFFSET(0x0800uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1INT0       IRQ_OFFSET(0x0800uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0INT1       IRQ_OFFSET(0x0804uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1INT1       IRQ_OFFSET(0x0804uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0TINT0      IRQ_OFFSET(0x0808uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1TINT0      IRQ_OFFSET(0x0808uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0TINT1      IRQ_OFFSET(0x080CuL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1TINT1      IRQ_OFFSET(0x080CuL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0NDAT0      IRQ_OFFSET(0x0810uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1NDAT0      IRQ_OFFSET(0x0810uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0NDAT1      IRQ_OFFSET(0x0814uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1NDAT1      IRQ_OFFSET(0x0814uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0MBSC0      IRQ_OFFSET(0x0818uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1MBSC0      IRQ_OFFSET(0x0818uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0MBSC1      IRQ_OFFSET(0x081CuL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1MBSC1      IRQ_OFFSET(0x081CuL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0OBUSY      IRQ_OFFSET(0x0820uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1OBUSY      IRQ_OFFSET(0x0820uL+(1 * 0x30uL))
#define IRQ_SRC_ERAY0IBUSY      IRQ_OFFSET(0x0824uL+(0 * 0x30uL))
#define IRQ_SRC_ERAY1IBUSY      IRQ_OFFSET(0x0824uL+(1 * 0x30uL))
#define IRQ_SRC_PMUHOST         IRQ_OFFSET(0x0860uL)
#define IRQ_SRC_PMUFSI          IRQ_OFFSET(0x0864uL)
#define IRQ_SRC_HSM0            IRQ_OFFSET(0x0870uL+(0 * 0x4uL))
#define IRQ_SRC_HSM1            IRQ_OFFSET(0x0870uL+(1 * 0x4uL))
#define IRQ_SRC_SCUERU0         IRQ_OFFSET(0x0880uL+(0 * 0x4uL))
#define IRQ_SRC_SCUERU1         IRQ_OFFSET(0x0880uL+(1 * 0x4uL))
#define IRQ_SRC_SCUERU2         IRQ_OFFSET(0x0880uL+(2 * 0x4uL))
#define IRQ_SRC_SCUERU3         IRQ_OFFSET(0x0880uL+(3 * 0x4uL))
#define IRQ_SRC_PMSDTS          IRQ_OFFSET(0x089CuL)
#define IRQ_SRC_PMS0            IRQ_OFFSET(0x08A0uL+(0 * 0x4uL))
#define IRQ_SRC_PMS1            IRQ_OFFSET(0x08A0uL+(1 * 0x4uL))
#define IRQ_SRC_PMS2            IRQ_OFFSET(0x08A0uL+(2 * 0x4uL))
#define IRQ_SRC_PMS3            IRQ_OFFSET(0x08A0uL+(3 * 0x4uL))
#define IRQ_SRC_SCR             IRQ_OFFSET(0x08B0uL)
#define IRQ_SRC_SMU0            IRQ_OFFSET(0x08C0uL+(0 * 0x4uL))
#define IRQ_SRC_SMU1            IRQ_OFFSET(0x08C0uL+(1 * 0x4uL))
#define IRQ_SRC_SMU2            IRQ_OFFSET(0x08C0uL+(2 * 0x4uL))
#define IRQ_SRC_PSI50           IRQ_OFFSET(0x08D0uL+(0 * 0x4uL))
#define IRQ_SRC_PSI51           IRQ_OFFSET(0x08D0uL+(1 * 0x4uL))
#define IRQ_SRC_PSI52           IRQ_OFFSET(0x08D0uL+(2 * 0x4uL))
#define IRQ_SRC_PSI53           IRQ_OFFSET(0x08D0uL+(3 * 0x4uL))
#define IRQ_SRC_PSI54           IRQ_OFFSET(0x08D0uL+(4 * 0x4uL))
#define IRQ_SRC_PSI55           IRQ_OFFSET(0x08D0uL+(5 * 0x4uL))
#define IRQ_SRC_PSI56           IRQ_OFFSET(0x08D0uL+(6 * 0x4uL))
#define IRQ_SRC_PSI57           IRQ_OFFSET(0x08D0uL+(7 * 0x4uL))
#define IRQ_SRC_DAM0LI0         IRQ_OFFSET(0x0900uL+(0 * 0x18uL))
#define IRQ_SRC_DAM1LI0         IRQ_OFFSET(0x0900uL+(1 * 0x18uL))
#define IRQ_SRC_DAM0RI0         IRQ_OFFSET(0x0904uL+(0 * 0x18uL))
#define IRQ_SRC_DAM1RI0         IRQ_OFFSET(0x0904uL+(1 * 0x18uL))
#define IRQ_SRC_DAM0LI1         IRQ_OFFSET(0x0908uL+(0 * 0x18uL))
#define IRQ_SRC_DAM1LI1         IRQ_OFFSET(0x0908uL+(1 * 0x18uL))
#define IRQ_SRC_DAM0RI1         IRQ_OFFSET(0x090CuL+(0 * 0x18uL))
#define IRQ_SRC_DAM1RI1         IRQ_OFFSET(0x090CuL+(1 * 0x18uL))
#define IRQ_SRC_DAM0DR          IRQ_OFFSET(0x0910uL+(0 * 0x18uL))
#define IRQ_SRC_DAM1DR          IRQ_OFFSET(0x0910uL+(1 * 0x18uL))
#define IRQ_SRC_DAM0ERR         IRQ_OFFSET(0x0914uL+(0 * 0x18uL))
#define IRQ_SRC_DAM1ERR         IRQ_OFFSET(0x0914uL+(1 * 0x18uL))
#define IRQ_SRC_CIFMI           IRQ_OFFSET(0x0930uL)
#define IRQ_SRC_CIFMIEP         IRQ_OFFSET(0x0934uL)
#define IRQ_SRC_CIFISP          IRQ_OFFSET(0x0938uL)
#define IRQ_SRC_CIFMJPEG        IRQ_OFFSET(0x093CuL)
#define IRQ_SRC_PSI5S0          IRQ_OFFSET(0x0950uL+(0 * 0x4uL))
#define IRQ_SRC_PSI5S1          IRQ_OFFSET(0x0950uL+(1 * 0x4uL))
#define IRQ_SRC_PSI5S2          IRQ_OFFSET(0x0950uL+(2 * 0x4uL))
#define IRQ_SRC_PSI5S3          IRQ_OFFSET(0x0950uL+(3 * 0x4uL))
#define IRQ_SRC_PSI5S4          IRQ_OFFSET(0x0950uL+(4 * 0x4uL))
#define IRQ_SRC_PSI5S5          IRQ_OFFSET(0x0950uL+(5 * 0x4uL))
#define IRQ_SRC_PSI5S6          IRQ_OFFSET(0x0950uL+(6 * 0x4uL))
#define IRQ_SRC_PSI5S7          IRQ_OFFSET(0x0950uL+(7 * 0x4uL))
#define IRQ_SRC_RIF0ERR         IRQ_OFFSET(0x0970uL+(0 * 0x8uL))
#define IRQ_SRC_RIF1ERR         IRQ_OFFSET(0x0970uL+(1 * 0x8uL))
#define IRQ_SRC_RIF0INT         IRQ_OFFSET(0x0974uL+(0 * 0x8uL))
#define IRQ_SRC_RIF1INT         IRQ_OFFSET(0x0974uL+(1 * 0x8uL))
#define IRQ_SRC_SPU0ERR         IRQ_OFFSET(0x0980uL+(0 * 0x8uL))
#define IRQ_SRC_SPU1ERR         IRQ_OFFSET(0x0980uL+(1 * 0x8uL))
#define IRQ_SRC_SPU0INT         IRQ_OFFSET(0x0984uL+(0 * 0x8uL))
#define IRQ_SRC_SPU1INT         IRQ_OFFSET(0x0984uL+(1 * 0x8uL))
#define IRQ_SRC_GPSR00          IRQ_OFFSET(0x0990uL+(0 * 0x4uL))
#define IRQ_SRC_GPSR01          IRQ_OFFSET(0x0990uL+(1 * 0x4uL))
#define IRQ_SRC_GPSR02          IRQ_OFFSET(0x0990uL+(2 * 0x4uL))
#define IRQ_SRC_GPSR03          IRQ_OFFSET(0x0990uL+(3 * 0x4uL))
#define IRQ_SRC_GPSR04          IRQ_OFFSET(0x0990uL+(4 * 0x4uL))
#define IRQ_SRC_GPSR05          IRQ_OFFSET(0x0990uL+(5 * 0x4uL))
#define IRQ_SRC_GPSR06          IRQ_OFFSET(0x0990uL+(6 * 0x4uL))
#define IRQ_SRC_GPSR07          IRQ_OFFSET(0x0990uL+(7 * 0x4uL))
#define IRQ_SRC_GPSR10          IRQ_OFFSET(0x09B0uL+(0 * 0x4uL))
#define IRQ_SRC_GPSR11          IRQ_OFFSET(0x09B0uL+(1 * 0x4uL))
#define IRQ_SRC_GPSR12          IRQ_OFFSET(0x09B0uL+(2 * 0x4uL))
#define IRQ_SRC_GPSR13          IRQ_OFFSET(0x09B0uL+(3 * 0x4uL))
#define IRQ_SRC_GPSR14          IRQ_OFFSET(0x09B0uL+(4 * 0x4uL))
#define IRQ_SRC_GPSR15          IRQ_OFFSET(0x09B0uL+(5 * 0x4uL))
#define IRQ_SRC_GPSR16          IRQ_OFFSET(0x09B0uL+(6 * 0x4uL))
#define IRQ_SRC_GPSR17          IRQ_OFFSET(0x09B0uL+(7 * 0x4uL))
#define IRQ_SRC_GPSR20          IRQ_OFFSET(0x09D0uL+(0 * 0x4uL))
#define IRQ_SRC_GPSR21          IRQ_OFFSET(0x09D0uL+(1 * 0x4uL))
#define IRQ_SRC_GPSR22          IRQ_OFFSET(0x09D0uL+(2 * 0x4uL))
#define IRQ_SRC_GPSR23          IRQ_OFFSET(0x09D0uL+(3 * 0x4uL))
#define IRQ_SRC_GPSR24          IRQ_OFFSET(0x09D0uL+(4 * 0x4uL))
#define IRQ_SRC_GPSR25          IRQ_OFFSET(0x09D0uL+(5 * 0x4uL))
#define IRQ_SRC_GPSR26          IRQ_OFFSET(0x09D0uL+(6 * 0x4uL))
#define IRQ_SRC_GPSR27          IRQ_OFFSET(0x09D0uL+(7 * 0x4uL))
#define IRQ_SRC_GPSR30          IRQ_OFFSET(0x09F0uL+(0 * 0x4uL))
#define IRQ_SRC_GPSR31          IRQ_OFFSET(0x09F0uL+(1 * 0x4uL))
#define IRQ_SRC_GPSR32          IRQ_OFFSET(0x09F0uL+(2 * 0x4uL))
#define IRQ_SRC_GPSR33          IRQ_OFFSET(0x09F0uL+(3 * 0x4uL))
#define IRQ_SRC_GPSR34          IRQ_OFFSET(0x09F0uL+(4 * 0x4uL))
#define IRQ_SRC_GPSR35          IRQ_OFFSET(0x09F0uL+(5 * 0x4uL))
#define IRQ_SRC_GPSR36          IRQ_OFFSET(0x09F0uL+(6 * 0x4uL))
#define IRQ_SRC_GPSR37          IRQ_OFFSET(0x09F0uL+(7 * 0x4uL))
#define IRQ_SRC_GPSR40          IRQ_OFFSET(0x0A10uL+(0 * 0x4uL))
#define IRQ_SRC_GPSR41          IRQ_OFFSET(0x0A10uL+(1 * 0x4uL))
#define IRQ_SRC_GPSR42          IRQ_OFFSET(0x0A10uL+(2 * 0x4uL))
#define IRQ_SRC_GPSR43          IRQ_OFFSET(0x0A10uL+(3 * 0x4uL))
#define IRQ_SRC_GPSR44          IRQ_OFFSET(0x0A10uL+(4 * 0x4uL))
#define IRQ_SRC_GPSR45          IRQ_OFFSET(0x0A10uL+(5 * 0x4uL))
#define IRQ_SRC_GPSR46          IRQ_OFFSET(0x0A10uL+(6 * 0x4uL))
#define IRQ_SRC_GPSR47          IRQ_OFFSET(0x0A10uL+(7 * 0x4uL))
#define IRQ_SRC_GPSR50          IRQ_OFFSET(0x0A30uL+(0 * 0x4uL))
#define IRQ_SRC_GPSR51          IRQ_OFFSET(0x0A30uL+(1 * 0x4uL))
#define IRQ_SRC_GPSR52          IRQ_OFFSET(0x0A30uL+(2 * 0x4uL))
#define IRQ_SRC_GPSR53          IRQ_OFFSET(0x0A30uL+(3 * 0x4uL))
#define IRQ_SRC_GPSR54          IRQ_OFFSET(0x0A30uL+(4 * 0x4uL))
#define IRQ_SRC_GPSR55          IRQ_OFFSET(0x0A30uL+(5 * 0x4uL))
#define IRQ_SRC_GPSR56          IRQ_OFFSET(0x0A30uL+(6 * 0x4uL))
#define IRQ_SRC_GPSR57          IRQ_OFFSET(0x0A30uL+(7 * 0x4uL))
#define IRQ_SRC_GTMAEIIRQ       IRQ_OFFSET(0x0A70uL)
#define IRQ_SRC_GTMARUIRQ0      IRQ_OFFSET(0x0A74uL+(0 * 0x4uL))
#define IRQ_SRC_GTMARUIRQ1      IRQ_OFFSET(0x0A74uL+(1 * 0x4uL))
#define IRQ_SRC_GTMARUIRQ2      IRQ_OFFSET(0x0A74uL+(2 * 0x4uL))
#define IRQ_SRC_GTMBRCIRQ       IRQ_OFFSET(0x0A80uL)
#define IRQ_SRC_GTMCMPIRQ       IRQ_OFFSET(0x0A84uL)
#define IRQ_SRC_GTMSPE0IRQ      IRQ_OFFSET(0x0A88uL+(0 * 0x4uL))
#define IRQ_SRC_GTMSPE1IRQ      IRQ_OFFSET(0x0A88uL+(1 * 0x4uL))
#define IRQ_SRC_GTMSPE2IRQ      IRQ_OFFSET(0x0A88uL+(2 * 0x4uL))
#define IRQ_SRC_GTMSPE3IRQ      IRQ_OFFSET(0x0A88uL+(3 * 0x4uL))
#define IRQ_SRC_GTMSPE4IRQ      IRQ_OFFSET(0x0A88uL+(4 * 0x4uL))
#define IRQ_SRC_GTMSPE5IRQ      IRQ_OFFSET(0x0A88uL+(5 * 0x4uL))
#define IRQ_SRC_GTMPSM00        IRQ_OFFSET(0x0AA0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMPSM01        IRQ_OFFSET(0x0AA0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMPSM02        IRQ_OFFSET(0x0AA0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMPSM03        IRQ_OFFSET(0x0AA0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMPSM04        IRQ_OFFSET(0x0AA0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMPSM05        IRQ_OFFSET(0x0AA0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMPSM06        IRQ_OFFSET(0x0AA0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMPSM07        IRQ_OFFSET(0x0AA0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMPSM10        IRQ_OFFSET(0x0AC0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMPSM11        IRQ_OFFSET(0x0AC0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMPSM12        IRQ_OFFSET(0x0AC0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMPSM13        IRQ_OFFSET(0x0AC0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMPSM14        IRQ_OFFSET(0x0AC0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMPSM15        IRQ_OFFSET(0x0AC0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMPSM16        IRQ_OFFSET(0x0AC0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMPSM17        IRQ_OFFSET(0x0AC0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMPSM20        IRQ_OFFSET(0x0AE0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMPSM21        IRQ_OFFSET(0x0AE0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMPSM22        IRQ_OFFSET(0x0AE0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMPSM23        IRQ_OFFSET(0x0AE0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMPSM24        IRQ_OFFSET(0x0AE0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMPSM25        IRQ_OFFSET(0x0AE0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMPSM26        IRQ_OFFSET(0x0AE0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMPSM27        IRQ_OFFSET(0x0AE0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMDPLL0        IRQ_OFFSET(0x0B00uL+(0 * 0x4uL))
#define IRQ_SRC_GTMDPLL1        IRQ_OFFSET(0x0B00uL+(1 * 0x4uL))
#define IRQ_SRC_GTMDPLL2        IRQ_OFFSET(0x0B00uL+(2 * 0x4uL))
#define IRQ_SRC_GTMDPLL3        IRQ_OFFSET(0x0B00uL+(3 * 0x4uL))
#define IRQ_SRC_GTMDPLL4        IRQ_OFFSET(0x0B00uL+(4 * 0x4uL))
#define IRQ_SRC_GTMDPLL5        IRQ_OFFSET(0x0B00uL+(5 * 0x4uL))
#define IRQ_SRC_GTMDPLL6        IRQ_OFFSET(0x0B00uL+(6 * 0x4uL))
#define IRQ_SRC_GTMDPLL7        IRQ_OFFSET(0x0B00uL+(7 * 0x4uL))
#define IRQ_SRC_GTMDPLL8        IRQ_OFFSET(0x0B00uL+(8 * 0x4uL))
#define IRQ_SRC_GTMDPLL9        IRQ_OFFSET(0x0B00uL+(9 * 0x4uL))
#define IRQ_SRC_GTMDPLL10       IRQ_OFFSET(0x0B00uL+(10 * 0x4uL))
#define IRQ_SRC_GTMDPLL11       IRQ_OFFSET(0x0B00uL+(11 * 0x4uL))
#define IRQ_SRC_GTMDPLL12       IRQ_OFFSET(0x0B00uL+(12 * 0x4uL))
#define IRQ_SRC_GTMDPLL13       IRQ_OFFSET(0x0B00uL+(13 * 0x4uL))
#define IRQ_SRC_GTMDPLL14       IRQ_OFFSET(0x0B00uL+(14 * 0x4uL))
#define IRQ_SRC_GTMDPLL15       IRQ_OFFSET(0x0B00uL+(15 * 0x4uL))
#define IRQ_SRC_GTMDPLL16       IRQ_OFFSET(0x0B00uL+(16 * 0x4uL))
#define IRQ_SRC_GTMDPLL17       IRQ_OFFSET(0x0B00uL+(17 * 0x4uL))
#define IRQ_SRC_GTMDPLL18       IRQ_OFFSET(0x0B00uL+(18 * 0x4uL))
#define IRQ_SRC_GTMDPLL19       IRQ_OFFSET(0x0B00uL+(19 * 0x4uL))
#define IRQ_SRC_GTMDPLL20       IRQ_OFFSET(0x0B00uL+(20 * 0x4uL))
#define IRQ_SRC_GTMDPLL21       IRQ_OFFSET(0x0B00uL+(21 * 0x4uL))
#define IRQ_SRC_GTMDPLL22       IRQ_OFFSET(0x0B00uL+(22 * 0x4uL))
#define IRQ_SRC_GTMDPLL23       IRQ_OFFSET(0x0B00uL+(23 * 0x4uL))
#define IRQ_SRC_GTMDPLL24       IRQ_OFFSET(0x0B00uL+(24 * 0x4uL))
#define IRQ_SRC_GTMDPLL25       IRQ_OFFSET(0x0B00uL+(25 * 0x4uL))
#define IRQ_SRC_GTMDPLL26       IRQ_OFFSET(0x0B00uL+(26 * 0x4uL))
#define IRQ_SRC_GTMERR          IRQ_OFFSET(0x0B70uL)
#define IRQ_SRC_GTMTIM00        IRQ_OFFSET(0x0B90uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM01        IRQ_OFFSET(0x0B90uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM02        IRQ_OFFSET(0x0B90uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM03        IRQ_OFFSET(0x0B90uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM04        IRQ_OFFSET(0x0B90uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM05        IRQ_OFFSET(0x0B90uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM06        IRQ_OFFSET(0x0B90uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM07        IRQ_OFFSET(0x0B90uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM10        IRQ_OFFSET(0x0BB0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM11        IRQ_OFFSET(0x0BB0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM12        IRQ_OFFSET(0x0BB0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM13        IRQ_OFFSET(0x0BB0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM14        IRQ_OFFSET(0x0BB0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM15        IRQ_OFFSET(0x0BB0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM16        IRQ_OFFSET(0x0BB0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM17        IRQ_OFFSET(0x0BB0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM20        IRQ_OFFSET(0x0BD0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM21        IRQ_OFFSET(0x0BD0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM22        IRQ_OFFSET(0x0BD0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM23        IRQ_OFFSET(0x0BD0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM24        IRQ_OFFSET(0x0BD0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM25        IRQ_OFFSET(0x0BD0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM26        IRQ_OFFSET(0x0BD0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM27        IRQ_OFFSET(0x0BD0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM30        IRQ_OFFSET(0x0BF0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM31        IRQ_OFFSET(0x0BF0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM32        IRQ_OFFSET(0x0BF0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM33        IRQ_OFFSET(0x0BF0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM34        IRQ_OFFSET(0x0BF0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM35        IRQ_OFFSET(0x0BF0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM36        IRQ_OFFSET(0x0BF0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM37        IRQ_OFFSET(0x0BF0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM40        IRQ_OFFSET(0x0C10uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM41        IRQ_OFFSET(0x0C10uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM42        IRQ_OFFSET(0x0C10uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM43        IRQ_OFFSET(0x0C10uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM44        IRQ_OFFSET(0x0C10uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM45        IRQ_OFFSET(0x0C10uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM46        IRQ_OFFSET(0x0C10uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM47        IRQ_OFFSET(0x0C10uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM50        IRQ_OFFSET(0x0C30uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM51        IRQ_OFFSET(0x0C30uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM52        IRQ_OFFSET(0x0C30uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM53        IRQ_OFFSET(0x0C30uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM54        IRQ_OFFSET(0x0C30uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM55        IRQ_OFFSET(0x0C30uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM56        IRQ_OFFSET(0x0C30uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM57        IRQ_OFFSET(0x0C30uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM60        IRQ_OFFSET(0x0C50uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM61        IRQ_OFFSET(0x0C50uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM62        IRQ_OFFSET(0x0C50uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM63        IRQ_OFFSET(0x0C50uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM64        IRQ_OFFSET(0x0C50uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM65        IRQ_OFFSET(0x0C50uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM66        IRQ_OFFSET(0x0C50uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM67        IRQ_OFFSET(0x0C50uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTIM70        IRQ_OFFSET(0x0C70uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTIM71        IRQ_OFFSET(0x0C70uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTIM72        IRQ_OFFSET(0x0C70uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTIM73        IRQ_OFFSET(0x0C70uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTIM74        IRQ_OFFSET(0x0C70uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTIM75        IRQ_OFFSET(0x0C70uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTIM76        IRQ_OFFSET(0x0C70uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTIM77        IRQ_OFFSET(0x0C70uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS00        IRQ_OFFSET(0x0CB0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS01        IRQ_OFFSET(0x0CB0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS02        IRQ_OFFSET(0x0CB0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS03        IRQ_OFFSET(0x0CB0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS04        IRQ_OFFSET(0x0CB0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS05        IRQ_OFFSET(0x0CB0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS06        IRQ_OFFSET(0x0CB0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS07        IRQ_OFFSET(0x0CB0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS10        IRQ_OFFSET(0x0CD0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS11        IRQ_OFFSET(0x0CD0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS12        IRQ_OFFSET(0x0CD0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS13        IRQ_OFFSET(0x0CD0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS14        IRQ_OFFSET(0x0CD0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS15        IRQ_OFFSET(0x0CD0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS16        IRQ_OFFSET(0x0CD0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS17        IRQ_OFFSET(0x0CD0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS20        IRQ_OFFSET(0x0CF0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS21        IRQ_OFFSET(0x0CF0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS22        IRQ_OFFSET(0x0CF0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS23        IRQ_OFFSET(0x0CF0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS24        IRQ_OFFSET(0x0CF0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS25        IRQ_OFFSET(0x0CF0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS26        IRQ_OFFSET(0x0CF0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS27        IRQ_OFFSET(0x0CF0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS30        IRQ_OFFSET(0x0D10uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS31        IRQ_OFFSET(0x0D10uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS32        IRQ_OFFSET(0x0D10uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS33        IRQ_OFFSET(0x0D10uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS34        IRQ_OFFSET(0x0D10uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS35        IRQ_OFFSET(0x0D10uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS36        IRQ_OFFSET(0x0D10uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS37        IRQ_OFFSET(0x0D10uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS40        IRQ_OFFSET(0x0D30uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS41        IRQ_OFFSET(0x0D30uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS42        IRQ_OFFSET(0x0D30uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS43        IRQ_OFFSET(0x0D30uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS44        IRQ_OFFSET(0x0D30uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS45        IRQ_OFFSET(0x0D30uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS46        IRQ_OFFSET(0x0D30uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS47        IRQ_OFFSET(0x0D30uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS50        IRQ_OFFSET(0x0D50uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS51        IRQ_OFFSET(0x0D50uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS52        IRQ_OFFSET(0x0D50uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS53        IRQ_OFFSET(0x0D50uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS54        IRQ_OFFSET(0x0D50uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS55        IRQ_OFFSET(0x0D50uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS56        IRQ_OFFSET(0x0D50uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS57        IRQ_OFFSET(0x0D50uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS60        IRQ_OFFSET(0x0D70uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS61        IRQ_OFFSET(0x0D70uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS62        IRQ_OFFSET(0x0D70uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS63        IRQ_OFFSET(0x0D70uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS64        IRQ_OFFSET(0x0D70uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS65        IRQ_OFFSET(0x0D70uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS66        IRQ_OFFSET(0x0D70uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS67        IRQ_OFFSET(0x0D70uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS70        IRQ_OFFSET(0x0D90uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS71        IRQ_OFFSET(0x0D90uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS72        IRQ_OFFSET(0x0D90uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS73        IRQ_OFFSET(0x0D90uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS74        IRQ_OFFSET(0x0D90uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS75        IRQ_OFFSET(0x0D90uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS76        IRQ_OFFSET(0x0D90uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS77        IRQ_OFFSET(0x0D90uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS80        IRQ_OFFSET(0x0DB0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS81        IRQ_OFFSET(0x0DB0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS82        IRQ_OFFSET(0x0DB0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS83        IRQ_OFFSET(0x0DB0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS84        IRQ_OFFSET(0x0DB0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS85        IRQ_OFFSET(0x0DB0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS86        IRQ_OFFSET(0x0DB0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS87        IRQ_OFFSET(0x0DB0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCS90        IRQ_OFFSET(0x0DD0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCS91        IRQ_OFFSET(0x0DD0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCS92        IRQ_OFFSET(0x0DD0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCS93        IRQ_OFFSET(0x0DD0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCS94        IRQ_OFFSET(0x0DD0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCS95        IRQ_OFFSET(0x0DD0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCS96        IRQ_OFFSET(0x0DD0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCS97        IRQ_OFFSET(0x0DD0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTOM00        IRQ_OFFSET(0x0E10uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTOM01        IRQ_OFFSET(0x0E10uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTOM02        IRQ_OFFSET(0x0E10uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTOM03        IRQ_OFFSET(0x0E10uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTOM04        IRQ_OFFSET(0x0E10uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTOM05        IRQ_OFFSET(0x0E10uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTOM06        IRQ_OFFSET(0x0E10uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTOM07        IRQ_OFFSET(0x0E10uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTOM10        IRQ_OFFSET(0x0E30uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTOM11        IRQ_OFFSET(0x0E30uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTOM12        IRQ_OFFSET(0x0E30uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTOM13        IRQ_OFFSET(0x0E30uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTOM14        IRQ_OFFSET(0x0E30uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTOM15        IRQ_OFFSET(0x0E30uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTOM16        IRQ_OFFSET(0x0E30uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTOM17        IRQ_OFFSET(0x0E30uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTOM20        IRQ_OFFSET(0x0E50uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTOM21        IRQ_OFFSET(0x0E50uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTOM22        IRQ_OFFSET(0x0E50uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTOM23        IRQ_OFFSET(0x0E50uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTOM24        IRQ_OFFSET(0x0E50uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTOM25        IRQ_OFFSET(0x0E50uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTOM26        IRQ_OFFSET(0x0E50uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTOM27        IRQ_OFFSET(0x0E50uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTOM30        IRQ_OFFSET(0x0E70uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTOM31        IRQ_OFFSET(0x0E70uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTOM32        IRQ_OFFSET(0x0E70uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTOM33        IRQ_OFFSET(0x0E70uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTOM34        IRQ_OFFSET(0x0E70uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTOM35        IRQ_OFFSET(0x0E70uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTOM36        IRQ_OFFSET(0x0E70uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTOM37        IRQ_OFFSET(0x0E70uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTOM40        IRQ_OFFSET(0x0E90uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTOM41        IRQ_OFFSET(0x0E90uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTOM42        IRQ_OFFSET(0x0E90uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTOM43        IRQ_OFFSET(0x0E90uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTOM44        IRQ_OFFSET(0x0E90uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTOM45        IRQ_OFFSET(0x0E90uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTOM46        IRQ_OFFSET(0x0E90uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTOM47        IRQ_OFFSET(0x0E90uL+(7 * 0x4uL))
#define IRQ_SRC_GTMTOM50        IRQ_OFFSET(0x0EB0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMTOM51        IRQ_OFFSET(0x0EB0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMTOM52        IRQ_OFFSET(0x0EB0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMTOM53        IRQ_OFFSET(0x0EB0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMTOM54        IRQ_OFFSET(0x0EB0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMTOM55        IRQ_OFFSET(0x0EB0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMTOM56        IRQ_OFFSET(0x0EB0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMTOM57        IRQ_OFFSET(0x0EB0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMATOM00       IRQ_OFFSET(0x0EF0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM01       IRQ_OFFSET(0x0EF0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM02       IRQ_OFFSET(0x0EF0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM03       IRQ_OFFSET(0x0EF0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM10       IRQ_OFFSET(0x0F00uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM11       IRQ_OFFSET(0x0F00uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM12       IRQ_OFFSET(0x0F00uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM13       IRQ_OFFSET(0x0F00uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM20       IRQ_OFFSET(0x0F10uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM21       IRQ_OFFSET(0x0F10uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM22       IRQ_OFFSET(0x0F10uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM23       IRQ_OFFSET(0x0F10uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM30       IRQ_OFFSET(0x0F20uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM31       IRQ_OFFSET(0x0F20uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM32       IRQ_OFFSET(0x0F20uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM33       IRQ_OFFSET(0x0F20uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM40       IRQ_OFFSET(0x0F30uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM41       IRQ_OFFSET(0x0F30uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM42       IRQ_OFFSET(0x0F30uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM43       IRQ_OFFSET(0x0F30uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM50       IRQ_OFFSET(0x0F40uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM51       IRQ_OFFSET(0x0F40uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM52       IRQ_OFFSET(0x0F40uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM53       IRQ_OFFSET(0x0F40uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM60       IRQ_OFFSET(0x0F50uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM61       IRQ_OFFSET(0x0F50uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM62       IRQ_OFFSET(0x0F50uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM63       IRQ_OFFSET(0x0F50uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM70       IRQ_OFFSET(0x0F60uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM71       IRQ_OFFSET(0x0F60uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM72       IRQ_OFFSET(0x0F60uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM73       IRQ_OFFSET(0x0F60uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM80       IRQ_OFFSET(0x0F70uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM81       IRQ_OFFSET(0x0F70uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM82       IRQ_OFFSET(0x0F70uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM83       IRQ_OFFSET(0x0F70uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM90       IRQ_OFFSET(0x0F80uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM91       IRQ_OFFSET(0x0F80uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM92       IRQ_OFFSET(0x0F80uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM93       IRQ_OFFSET(0x0F80uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM100      IRQ_OFFSET(0x0F90uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM101      IRQ_OFFSET(0x0F90uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM102      IRQ_OFFSET(0x0F90uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM103      IRQ_OFFSET(0x0F90uL+(3 * 0x4uL))
#define IRQ_SRC_GTMATOM110      IRQ_OFFSET(0x0FA0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMATOM111      IRQ_OFFSET(0x0FA0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMATOM112      IRQ_OFFSET(0x0FA0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMATOM113      IRQ_OFFSET(0x0FA0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCSW0        IRQ_OFFSET(0x0FD0uL+(0 * 0x4uL))
#define IRQ_SRC_GTMMCSW1        IRQ_OFFSET(0x0FD0uL+(1 * 0x4uL))
#define IRQ_SRC_GTMMCSW2        IRQ_OFFSET(0x0FD0uL+(2 * 0x4uL))
#define IRQ_SRC_GTMMCSW3        IRQ_OFFSET(0x0FD0uL+(3 * 0x4uL))
#define IRQ_SRC_GTMMCSW4        IRQ_OFFSET(0x0FD0uL+(4 * 0x4uL))
#define IRQ_SRC_GTMMCSW5        IRQ_OFFSET(0x0FD0uL+(5 * 0x4uL))
#define IRQ_SRC_GTMMCSW6        IRQ_OFFSET(0x0FD0uL+(6 * 0x4uL))
#define IRQ_SRC_GTMMCSW7        IRQ_OFFSET(0x0FD0uL+(7 * 0x4uL))
#define IRQ_SRC_GTMMCSW8        IRQ_OFFSET(0x0FD0uL+(8 * 0x4uL))
#define IRQ_SRC_GTMMCSW9        IRQ_OFFSET(0x0FD0uL+(9 * 0x4uL))

typedef uint16 IrqType;

#define NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS		2004

#define IRQ_SRPN_CNT							512

#define IRQ_SRPN_TOP_PRIO                       256uL

 /* Offset from start of exceptions to interrupts
 * Exceptions have negative offsets while interrupts have positive
  */
 #define IRQ_INTERRUPT_OFFSET  0

 #define Irq_SOI()

 /* Total number of interrupts and exceptions
  */

 typedef enum {
    CLOCK_CPU0,
    CLOCK_CPU1,
    CLOCK_CPU2,
	CLOCK_CPU3,
	CLOCK_CPU4,
	CLOCK_CPU5,
    CLOCK_STM,
 } Mcu_Arc_PeriperalClock_t;


 typedef enum {
     CPU_0 = 0,
     CPU_1 = 1,
     CPU_2 = 2,
     CPU_3 = 3,
     CPU_4 = 4,
     CPU_5 = 5,
 } Cpu_t;

#endif /* IRQ_TC399_H_ */
